Sunday, October 23, 2016
Best paper candidates in bold
9:00-10:30Session V - Verification & Model Checking
Lukáš Charvát, Aleš Smrčka, and Tomáš Vojnar: HADES: Microprocessor Hazard Analysis via Formal Verification of Parameterized Systems

Karlheinz Friedberger and Dirk Beyer: A Light-Weight Approach for Verifying Multi-Threaded Programs with CPAchecker

Martin Demko, David Šafránek, Luboš Brim, Samuel Pastva, Nikola Beneš, and Matej Hajnal: A Model Checking Approach to Dynamical Systems Analysis (presentation)
10:30-11:00Coffee Break
11:00-12:00Luca Bortolussi: The machine learning way to formal verification (invited talk)
12:00-12:15Closing & Best Paper/Presentation/Poster Awards
12:20-13:00Lunch